As with other protocols, PCI Express imposes ordering rules on transactions moving through the fabric at the same time. The reasons for the ordering rules include:
Ensuring that the completion of transactions is deterministic and in the sequence intended by the programmer.
Avoiding deadlocks conditions.
Maintaining compatibility with ordering already used on legacy buses
Maximize performance and throughput by minimizing read latencies and managing read/write ordering.
PCI Express ordering is based on the same Producer/Consumer model as PCI.
The split transaction protocol and related ordering rules are fairly straight forward when restricting the discussion to transactions involving only native PCI Express devices. However, ordering becomes more complex when including support for the legacy buses mentioned in bullet three above.
Rather than presenting the ordering rules defined by the specification and attempting to explain the rationale for each rule, this chapter takes the building
block approach. Each major ordering concern is introduced one at a time. The discussion begins with the most conservative (and safest) approach to ordering,
progresses to a more aggressive approach (to improve performance), and culminates with the ordering rules presented in the specification. The discussion is
segmented into the following sections:
The Producer/Consumer programming model upon which the fundamental ordering rules are based.
The fundamental PCI Express device ordering requirements that ensure the Producer/Consumer model functions correctly.
The Relaxed Ordering feature that permits violation of the Producer/Consumer ordering when the device issuing a request knows that the transaction is not part of a Producer/Consumer programming sequence.
Modification of the strong ordering rules to improve performance.
Avoiding deadlock conditions and support for PCI legacy implementations.
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